Microprocessor and Computer Architecture — CACS155 (2nd Sem)

ye Tribhuvan University we x. a y Faculty of Humanities & Social Sciences | Xx | OFFICE OF THE DEAN | wy 2021 Bachelor in Computer Applications Full Marks: 60 | | Course Title: Microprocessor and Computer Architecture Pass Marks: 24 Code No: CACS 155 Time: 3 hours Semester: II Batch: 2021 Candidates are required to answer the questions in their own words as far as possible. Group B Attempt any SIX questions. [6x5 = 30] 2. Define addressing mode? Suppose content of register A and B is 37H and 57H respectively. Find ~ the content of flag register after ADD B is performed. [2+3] oe What is the requirement of common bus System? Explain with figure _4 Explain Symbolic Microinstruction and microinstruction format. S< What is stack? Give the organization of register stack with all necessary elements. 6. What is pipeline conflict? Explain data dependency and handling of branch instruction in detail. F. Explain the basic working principle of the Control Unit with timing diagram. oe the following instructions a) LHLD 5050H b) CPI 34H | | c) JNZ 6080H . Group C ALSEIDE any TWO questions. [2x10 = 20] 9 draw the timing diagram for MOV B. For ten bytes of data Starting from 7050H, write a program to sort the reading in ascending order [4+6] ‘10. a or ee of Address Sequencing in detail. Draw A explain selection of address for i [5+5] “Dies four-segment instruction pipeline with suitable diagram. |